Saiyu Ren (Advisor), Raymond Siferd (Committee Member), Yan Zhuang (Committee Member)
Master of Science in Engineering (MSEgr)
Multi-finger layout technique has been extensively used in Nano-scale CMOS circuit design due to the increased circuit performance compared to a single finger layout. However choosing a finger width (W_f) and number of fingers (N_f) to optimize circuit performance is a challenging problem. In this thesis, the performances of 2.4GHz and 6.0GHz single ended low noise amplifiers (LNA) with fixed total transistor widths in 90nm CMOS technology are analyzed as function of number of fingers, bias voltage (V_bias) and channel length (L). The results show that the drain to source current, transconductance and effective gate capacitance increase with increasing number of fingers. The effect of finger numbers, supply voltage and channel length on transistor cutoff frequency, low noise amplifier noise figure, voltage gain, center frequency, and impedance matching is presented. The simulation results show that the finger numbers affect the single ended cascode low noise amplifier slightly due to the inductors used. The bias voltage and channel length are the key parameters for this low noise amplifier design. A 200nm transistor length LNA has better gain and filter quality factor compared with 100nm for 2.4GHz and 6GHz cases in 90nm process. A higher bias voltage can decrease the noise figure, however, the trade-off is the power consumption is increased.
Department or Program
Department of Electrical Engineering
Year Degree Awarded
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