FPGA-Based Implementation of a Digital Processor for an Instantaneous Frequency Measurement Receiver
Publication Date
2007
Document Type
Thesis
Committee Members
Henry Chen (Advisor), John Emmert (Other), Raymond Siferd (Other), Joseph Thomas (Other)
Degree Name
Master of Science in Engineering (MSEgr)
Abstract
Digital wideband receivers are essential elements used in electronic warfare (EW) applications. Instantaneous Frequency Measurement (IFM) receivers are suitable for use in EW systems due to the ultrawide instantaneous radio-frequency (RF) bandwidth, fine-frequency resolution, and moderately high sensitivity and dynamic range. Conventional IFM receivers use analog components such as power dividers, crystal video detectors, and hybrids. This research presents the architecture and design implementation of a purely digital IFM receiver based on a patented algorithm courtesy of the United States Air Force. The invention is capable of detecting a short wave pulse with 1 MHz error for every 100 nsec. The benefits include a compact, lightweight, cost-effective alternative to its analog counterpart. The design was implemented and tested on Delphi's ADC3255 (a PMC digitizer with Xilinx Virtex 4 FPGA). The outputs were verified using Xilinx's ChipScope Pro.
Page Count
85
Department or Program
Department of Electrical Engineering
Year Degree Awarded
2007
Copyright
Copyright 2007, all rights reserved. This open access ETD is published by Wright State University and OhioLINK.
