Marian K. Kazimierczuk, Ph.D. (Advisor); Yan Zhuang, Ph.D. (Committee Member); Michael A. Saville, Ph.D. (Committee Member); Lavern Alan Starman, Ph.D. (Committee Member); Saiyu Ren, Ph.D. (Committee Member)
Doctor of Philosophy (PhD)
There is a high demand for low step-down dc voltage conversions. Many conventional power converters that are currently being used have a moderate conversion ratio and this may not be sufficient to meet the demand. This can be achieved by either cascading power converters or using converters with a low step-down conversion ratio. Cascading the converters increases the power conversion stage complexity and increase the order of the system, while also affecting the stability. Using converters with a high conversion ratio seems to be a more intelligent option to root. This dissertation tackles to analyze one such converter, called tapped-inductor buck dc-dc converter. A tapped-inductor buck dc-dc converter, capable to produce higher conversion ratios compared to the conventional converters is used. An analysis describing a detailed steady-state operation of the converter is provided. The expected voltage and current waveforms across different components at different points of time during the entire operation of the converter are analytically derived. Design equations for the converter have also been provided. Power lost across various converter components are predicted. The overall converter efficiency is calculated. The dynamics of the system are predicted. For this a model of the tapped-inductor buck dc-dc converter is derived using circuit averaging technique. Transfer functions relating the output to the input and the control voltages are derived. Various poles and zeros affecting the system magnitude and phase plots were analytically defined. A controller closed-loop system is implemented. Various time and frequency domain parameters affecting the system response are measured and compared to the open-loop system. All the theoretically obtained responses are implemented using MATLAB and verified using saber circuit simulator. The verified model responses from the simulations are also validated through hardware implementation.
Year Degree Awarded
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