Publication Date


Document Type


Committee Members

Chien-in Henry Chen (Committee Member), Marian Kazmierczuk (Committee Member), Raymond Siferd (Advisor)

Degree Name

Master of Science in Engineering (MSEgr)


Over the past two decades frequency synthesizer has progressed from a relatively crystal bank synthesizer to multi-loop phase locked loops. But in recent years direct digital synthesizers (DDS) have witnessed an increase in demand over their analog counterparts. The DDS offers a wide range of advantages over phase locked loops such as high frequency range, fast switching response, and sub-hertz frequency resolution. However, the conventional DDS suffers limitations due to its architecture involving digital-to-analog converter (DAC) and read-only-memory (ROM) with respect to high clock speeds.

The Pulse Output Direct Digital Synthesizer (PODDS) presented in this thesis eliminates the necessity for a DAC and ROM, and replaces the phase conversion block present in the conventional DDS with an Analog filter bank to generate the sine wave. The PODDS operates at a frequency of 2.25GHz, with a 16-b phase accumulator designed using carry look-ahead adder. The analog filter bank was designed using an array of low-pass Chebyshev filters. A frequency range of 1.1 MHz to 1.125GHz was achieved with average power consumption of 83mW.

Page Count


Department or Program

Department of Electrical Engineering

Year Degree Awarded