Low-loss on-chip transmission lines with micro-patterned artificial dielectric shields
Document Type
Article
Publication Date
7-24-2008
Abstract
Low-loss coplanar waveguide (CPW) transmission lines integrated on a standard (5-10 Ω · cm) silicon substrate are realised by using an artificial dielectric shield with a very high in-plane dielectric constant. The shield consists of a 30 nm-thick Al2O3 film sandwiched by two 100 nm-thick aluminium layers patterned into lattices of μm-size elements. The individual metallic elements are micro-patterned to suppress the flow of eddy currents at microwave frequencies. Inserted below the CPW, the shield blocks the electric field of the line from entering the silicon substrate. The resulting line attenuation (measured up to 25 GHz) is comparable to that of identical CPWs built on a high-resistivity silicon wafer. © 2008 The Institution of Engineering and Technology.
Repository Citation
Ma, Y.,
Rejaei, B.,
& Zhuang, Y.
(2008). Low-loss on-chip transmission lines with micro-patterned artificial dielectric shields. Electronics Letters, 44 (15), 913-915.
https://corescholar.libraries.wright.edu/math/412
DOI
10.1049/el:20081324
