Traps in 4H-SiC Field-Effect Transistors Characterized by Capacitance- and Current-Mode Deep-Level Transient Spectroscopy
Traps in SiC long-gate metal-semiconductor field-effect transistors (FATFETs) at different wafer positions have been characterized by deep-level transient spectroscopy (DLTS) based on capacitance (C-DLTS) or current (I-DLTS). Two major electron traps, Z (1/2) and V (1/2), of energies 0.68 eV and 0.91 eV, respectively, are found mainly in the SiC buffer layer, and several hole-like traps appear in the surface or interface regions. In some regions of the wafer, an electron trap EH(6/7) of energy 1.77 eV is prominent. Trap EH(6/7) as well as the hole-like traps are not uniformly distributed on the wafer.
Look, D. C.,
& Odekirk, B.
(2011). Traps in 4H-SiC Field-Effect Transistors Characterized by Capacitance- and Current-Mode Deep-Level Transient Spectroscopy. Journal of Electronic Materials, 40 (11), 2179-2186.