Effect of Multistep Wafer-Annealing on Main Traps in Czochralski-Grown Semi-Insulating GaAs

Authors

Z-Q. FangFollow
David C. Look, Wright State University - Main CampusFollow
H. Yamamoto
H. Shimakura

Document Type

Article

Publication Date

11-1-1996

Abstract

Both multistep wafer‐annealed (MWA) and ingot‐annealed semi‐insulating (SI) GaAs wafers, grown by the Czochralski technique, are characterized by using normalized thermally stimulated current (NTSC) spectroscopy. Two main NTSC traps, T₃ at 200 K and T₅ at 140 K, which are thought to be related to arsenic vacancy defects, are found to be largely suppressed by MWA processes, especially by a new MWA process. Concomitant with a decrease of these traps, a significant increase of the threshold electrical field for both the thermal quenching of T₅ and the low‐temperature photocurrent saturation has been observed

Comments

Copyright © 1996, American Institute of Physics. This article may be downloaded for personal use only. Any other use requires prior permission of the author and the American Institute of Physics. The following article appeared in Applied Physics Letters 69.22, and may be found at http://apl.aip.org/resource/1/applab/v69/i22/p3417_s1

Repository Citation

Fang, Z., Look, D. C., Yamamoto, H., & Shimakura, H. (1996). Effect of Multistep Wafer-Annealing on Main Traps in Czochralski-Grown Semi-Insulating GaAs. Applied Physics Letters, 69 (22), 3417-3419.
https://corescholar.libraries.wright.edu/physics/55

DOI

10.1063/1.117278