Design Recovery for Incomplete Combinational Logic

Authors

Travis E. Doom, Wright State University - Main CampusFollow
Anthony S. Wojcik
Moon-Jung Chung

Document Type

Conference Proceeding

Publication Date

3-1999

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Abstract

Motivated by the problem of reengineering legacy digital circuits for which design information is missing or incomplete, this paper presents a new technique for representing the relationships among the internal components of a combinational circuit. This technique proves to be a powerful tool for redesign, capable of representing internal Boolean relationships in a fully or partially specified multiple-output combinational circuit with a single data structure.

Comments

Presented at the Ninth Great Lakes Symposium on VLSI, Ypsilanti, MI, March 4-6, 1999.

Repository Citation

Doom, T. E., Wojcik, A. S., & Chung, M. (1999). Design Recovery for Incomplete Combinational Logic. Proceedings of the Ninth Great Lakes Symposium on VLSI, 184-187.
https://corescholar.libraries.wright.edu/cse/287

DOI

10.1109/GLSV.1999.757406