Publication Date


Document Type


Committee Members

Robert Muse (Other), Saiyu Ren (Advisor), Arnab Shaw (Advisor), Ray Siferd (Committee Member)

Degree Name

Master of Science in Electrical Engineering (MSEE)


This thesis explores a novel detection architecture for use in a Direct-Detect Flash LIDAR system. The proposed architecture implements detection of the last two surfaces within single pixels of a target scene. The novel, focal plane integrated detector design allows for detection of objects behind sparse and/or partially reflective covering such as forest canopy. The proposed detector would be duplicated and manufactured on-chip behind each avalanche photodiode within a focal plane array. Analog outputs are used to minimize interference from digital components on the analog input signal. The proposed architecture is a low-footprint solution which requires low computational post-processing. Additionally, constant fraction discrimination is used to mitigate range walk. The proposed architecture is designed in 90nm CMOS technology. The footprint is 170.1 [mu]m[squared]; with the largest transistor dimension being 22 [mu]m. The design is easily expandable in hardware to allow additional surfaces to be detected.

Page Count


Department or Program

Department of Electrical Engineering

Year Degree Awarded


Creative Commons License

Creative Commons Attribution-Noncommercial-No Derivative Works 3.0 License
This work is licensed under a Creative Commons Attribution-Noncommercial-No Derivative Works 3.0 License.