GaAs MMIC Wafer Level Mapping for Material and Process Diagnostics
Document Type
Article
Publication Date
1991
Abstract
Wafer-level mapping of material and device parameters at critical MMIC (monolithic microwave integrated circuit) fabrication steps has been used at various processing steps with a high-density FET array mask to distinguish processing problem areas and a monitoring tool to track process improvements and process reproducibility over short and long periods of time. Improvements in uniformity are observed by improved active layer uniformity by optimization of the anneal furnace, by converting from manual gate recess etching to automated spray etching, by improved gate design and gate mask. The use of wafer-level mapping and wafer-level histogram comparison of typical sets of data (1074 data points per wafer) has enabled the authors to compare overall wafer-level performance from wafer to wafer and from lot to lot for cost-effective MMIC manufacturing.
Repository Citation
Kanber, H.,
Wang, D. C.,
Pan, E. T.,
& Look, D. C.
(1991). GaAs MMIC Wafer Level Mapping for Material and Process Diagnostics. 13th Annual Gallium Arsenide Integrated Circuit (GaAs IC) Symposium, 285-288.
https://corescholar.libraries.wright.edu/physics/668
DOI
10.1109/GAAS.1991.172693
Comments
Presented at the 13th Annual Gallium Arsenide Integrated Circuit (GaAs IC) Symposium, Monterey, CA.