Publication Date

2016

Document Type

Thesis

Committee Members

Henry Chen (Committee Member), Zhiqiang Wu (Committee Member), Jiafeng Xie (Advisor)

Degree Name

Master of Science in Electrical Engineering (MSEE)

Abstract

All-one-polynomial (AOP)-based systolic multipliers over GF (2m) are usually not con-sidered for practical implementation of cryptosystems such as elliptic curve cryptography (ECC) due to security reasons. Besides that, systolic AOP multipliers usually suer from the problem of high register-complexity, especially in field-programmable gate array (FPGA) platforms where the register resources are not that abundant. In this thesis, however, we have shown that the AOP-based systolic multipliers can easily achieve low register-complexity implementations and the proposed architectures can be employed as computation cores to derive ecient implementations of systolic Montgomery multipli-ers based on trinomials, which are recommended by the National Institute of Standards and Technology (NIST) for cryptosystems. In this paper, first, we propose a novel data broadcasting scheme in which the register-complexity involved within existing AOP-based systolic multipliers is significantly reduced. We have found out that for practical usage, the modified AOP-based systolic structure can be packed as a standard computation core. Next, we propose a novel Montgomery multiplication algorithm that can fully em-ploy the proposed AOP-based computation core. The proposed Montgomery algorithm employs a novel pre-computed-modular (PCM) operation, and the systolic structures based on this algorithm fully inherit the advantages brought from the AOP-based core (low register-complexity, low critical-path delay, and low latency) except some marginal hardware overhead brought by a pre-computation unit. The proposed architectures are then implemented by Xilinx ISE 14.1 and it is shown that compared with the existing designs, the proposed designs achieve at least 70.0% and 47.6% less area-delay product (ADP) and power-delay product (PDP) than the best of competing designs, respectively.

Page Count

60

Department or Program

Department of Electrical Engineering

Year Degree Awarded

2016

Creative Commons License

Creative Commons Attribution-Noncommercial-No Derivative Works 3.0 License
This work is licensed under a Creative Commons Attribution-Noncommercial-No Derivative Works 3.0 License.


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