Publication Date
2016
Document Type
Thesis
Committee Members
Chien-In Henry Chen (Advisor), Jiafeng Xie (Committee Member), Yan Zhuang (Committee Member)
Degree Name
Master of Science in Engineering (MSEgr)
Abstract
In analog signal processing the squaring circuit represents the core for implementing an analog signal having a value representing the square of the input signal. For example, calculating the square of input signal is necessary in adaptive processing of an input signal based on its instantaneous root mean square value. In this thesis, a new 1-Ghz analog signal squaring circuit (squarer) designed in 180 nanometer CMOS process is presented. It is implemented by CMOS components including current source, current mirror, differential amplifier, low-pass filter, and voltage output buffer. A gain control amplifier and a 10-bit ADC are set up to evaluate the dynamic performance of the CMOS signal squarer. The measured results show a wide sweep capability of analog signal frequency up to 1 GHz with good linearity and spurious-free dynamic range.
Page Count
46
Department or Program
Department of Electrical Engineering
Year Degree Awarded
2016
Copyright
Copyright 2016, all rights reserved. My ETD will be available under the "Fair Use" terms of copyright law.
