Publication Date
2007
Document Type
Thesis
Committee Members
Henry Chen (Advisor)
Degree Name
Master of Science in Engineering (MSEgr)
Abstract
Built-In Self-Test (BIST) is a method of designing and creating an electronic chip or an electronic system that can self test for correct functionality and ensure no manufacturing defects. The reason for analog BIST is the testing of analog parts of analog and mixed-signal ICs is a costly process that traditionally requires the use of expensive high-end automatic test equipment. Due to the nature of the testing and length of the testing process, an efficient analog BIST scheme is in high demand for the ever increasing complexity of analog and mixed-signal circuits. This thesis presents a BIST scheme for generation and response waveform extraction that allows the detection of a faulty circuit design. Along with the detection, an approach to test high speed analog and mixed-signal circuits with test signals upwards of 1GHz is presented. A practical application is to test analog or mixed-signal IC that has a wide bandwidth ADC in its front-end. The BIST scheme includes a method to store the test signal and generate it for the circuit to be tested along with a way to extract the response test signal from multiple test points and allow fault detection. Along with this research, a stepping stone is implemented for analog modeling using MATLAB for accuracy and speed of circuit simulations. The problems associated with the BIST scheme and analog modeling is discussed, along with recommendations.
Page Count
131
Department or Program
Department of Electrical Engineering
Year Degree Awarded
2007
Copyright
Copyright 2007, all rights reserved. This open access ETD is published by Wright State University and OhioLINK.
