Publication Date
2007
Document Type
Thesis
Committee Members
Chien-in Chen (Advisor)
Degree Name
Master of Science in Engineering (MSEgr)
Abstract
The advent of field-programmable gate array (FPGA) has provided an excellent platform to market prototyping of full receiver-on-chip designs in a short time. The design of multi-tone wideband receiver has always been a challenge because of the difficulty to detect weak signals in the presence of noise in the frequency spectrum and also the presence of general spurs generated by the receiver. In this research, architecture for a FPGA-based 2.56-GSPS digital wideband receiver with multi-tone signal detection and tracking is designed to demonstrate the capability of replacing more expensive analog components into their cheaper digital design counterparts. Novel hardware implementations of a Hamming window function, a fast Fourier transform (FFT), and an encoder algorithm is presented. This receiver can distinguish four-tone signals for a bandwidth of 1.20 GHz at a 20 MHz interval, has an average of four-tone signal spurious-free dynamic range (SFDR) of 22 dB, two-tone signal SFDR of 39 dB, and single signal SFDR of 45.5 dB. The digital receiver can also track the input signals and distinguish if they are continuous or a pulse wave signals.
Page Count
93
Department or Program
Department of Electrical Engineering
Year Degree Awarded
2007
Copyright
Copyright 2007, all rights reserved. This open access ETD is published by Wright State University and OhioLINK.
