Publication Date
2018
Document Type
Dissertation
Committee Members
Saiyu Ren (Advisor), Ray Siferd (Committee Member), Marty Emmert (Committee Member), Marian Kazimierczuk (Committee Member), Yan Zhuang (Committee Member)
Degree Name
Doctor of Philosophy (PhD)
Abstract
Microelectronic circuit is ubiquitous component of modern electrical devices. The increasing complexity and professionality of phases in microelectronic supply chain bring more global cooperation to integrated circuit (IC) production. Therefore, providing a secure environment for microelectronic circuit design does not ensure the integrity of the hardware since any participator of IC fabrication has the opportunity to implant a malicious alteration in original IC design. Especially overseas chip-fabrication is a vital potential threat for national defense products. In theory, anyone who has access to fabrication process can tamper with the original design, with the potential to change function, modify parametric properties or even have confidential information transmitted to the attacker. The surreptitious modification of an IC is denoted as Hardware Trojan (HT). To address the issue of providing robust and reliable IC products, this dissertation proposes HT detection techniques which are based on HT activation and side-channel analysis. Simulation results show that the proposed technique can detect HT with areas that are 0.013% of the host-circuitry. Combinational use of multiple detection techniques will facilitate detection probability. Also, low power-delay-product (PDP) VLSI design is considered for optimizing parametric overhead of detection circuit. Simulation results indicate that the proposed VLSI design optimization techniques can improve PDP of dynamic and static CMOS circuits by up to 61.9% and 49.9%, respectively.
Page Count
144
Department or Program
Ph.D. in Engineering
Year Degree Awarded
2018
Copyright
Copyright 2018, all rights reserved. My ETD will be available under the "Fair Use" terms of copyright law.
