Publication Date
2009
Document Type
Dissertation
Committee Members
Chien-in Henry Chen (Advisor), Wen-ben Jone (Committee Member), Raymond E. Siferd (Committee Member), Bin Wang (Committee Member), Zhiqiang John Wu (Committee Member)
Degree Name
Doctor of Philosophy (PhD)
Abstract
The fast Fourier transform (FFT) plays a critical role in many modern applications, such as acoustics, optics, telecommunications, wireless sensor networks, location sensing, patient monitoring, speech, signal detection, and image processing. The input dynamic range, data throughput rate, frequency resolution, bandwidth, design flexibility, hardware consumption, and power requirements for the various applications are vastly different, leading to significant research focusing on different aspects of FFT performance improvement.
The proposed dynamic kernel function uses an efficient fixed-point numerical representation of the twiddle factor and replaces the cumbersome multipliers with simple shift-and-add operations to enhance the data throughput rate for high-speed wideband signal detection. Numerical representation in hardware plays a role in determining the dynamic range and bit precision of FFT processors. Variable truncation scheme dynamically scales the computation data and maximizes the use of fixed-input and inter-stage wordlength in existing hardware efficient fixed-point FFT. The above data scaling algorithm enhances the dynamic range of fixed-point fixed-precision FFT designs and emulates the precision benefits of floating-point representation without complicated design additions. Novel algorithms and performance analysis for hardware efficient representation of twiddle factors are studied for multi-tone signal detection with dynamic kernel function FFT processors. The development of hardware performance estimation models based on different number of bits used for dynamic kernel function shows the relative trade-off between kernel bits to FFT spurious-free dynamic range (SFDR) and phase performance.
A 2.048 GSPS fixed-point fixed-precision dynamic kernel function FFT processor with variable truncation scheme is proposed, developed and implemented for real-time wideband signal detection. Using an Atmel 10-bit ADC, two-tone real-time signal detection is demonstrated for a bandwidth of 912 MHz with 16 MHz channelization and output throughput rates of 62.5 ns. The proposed design has an averaged single signal SFDR of 26 dB and the ability to detect a weak input signal at -42 dBm. The overall dynamic range (DR) of the system is 45 dB. This is possible for a fixed-precision FFT design due to the embedded variable truncation scheme to extend the total DR while preserving the instantaneous dynamic range (IDR) relationship. Additional case studies utilizing different dynamic kernel function and inter-stage precision shows important area and performance trade-offs when utilized in a high-speed wideband FFT processor without the use of decimators.
Page Count
120
Department or Program
Ph.D. in Engineering
Year Degree Awarded
2009
Copyright
Copyright 2009, all rights reserved. This open access ETD is published by Wright State University and OhioLINK.
